An Efficient Layered Decoding Architecture for Nonbinary QC-LDPC Codes-Reference-Cited by-同舟云学术

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An Efficient Layered Decoding Architecture for Nonbinary QC-LDPC Codes

Published:2012-02 Issue:2 Volume:59 Page:385-398
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Ueng Yeong-Luh,Leong Chen-Yap,Yang Chung-Jay,Cheng Chung-Chao,Liao Kuo-Hsuan,Chen Shu-Wei

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/8919/6139305/06021351.pdf?arnumber=6021351

Cited by 33 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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3. A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA and GPU Architectures;IEEE Communications Surveys & Tutorials;2021

4. An Efficient Short High-Order Non-Binary LDPC Decoder Architecture Using a Message-Adaptation EMS Algorithm;IEEE Access;2021

5. Efficient First Four Minimum Values Finder for NB-LDPC Decoders with Compressed Messages;IEEE Transactions on Circuits and Systems II: Express Briefs;2021

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