An Efficient Switching Technique for NoCs with Reduced Buffer Requirements

Author:

Requena Crispín Gómez,Requena María Engracia Gómez,Rodríguez Pedro Juan López,Marín Jose Duato

Publisher

IEEE

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Subnetwork Based Traffic Aware Rerouting for CMesh Bufferless Network-on-Chip;Journal of Circuits, Systems and Computers;2024-02-16

2. DAReS: Deflection Aware Rerouting between Subnetworks in Bufferless On-Chip Networks;Proceedings of the Great Lakes Symposium on VLSI 2022;2022-06-06

3. Stay in your Lane: A NoC with Low-overhead Multi-packet Bypassing;2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2022-04

4. OcNoC: Efficient One-Cycle Router Implementation for 3D Mesh Network-on-Chip;2015 28th International Conference on VLSI Design;2015-01

5. QBNoC: QoS-aware bufferless NoC architecture;Microelectronics Journal;2014-06

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