The Design of a 57-65GHz SPDT Switch with LC Resonant Techniques in 40 nm CMOS Process
Author:
Affiliation:
1. Fudan University,State Key Laboratory of ASIC & System,China
2. Nanjing Electronic Equipment Institute,China
Funder
National Key Research and Development Program of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9977438/9977447/09977574.pdf?arnumber=9977574
Reference7 articles.
1. Analysis and Design of 60-GHz SPDT Switch in 130-nm CMOS
2. A 2.5-dB Insertion Loss, DC-60 GHz CMOS SPDT Switch in 45-nm SOl;parlak;IEEE Compound Semiconductor Integrated Circuits Symposium (CSICS) Sept 2011,2011
3. A Millimeter-Wave CMOS Dual-Bandpass T/R Switch With Dual-Band LC Network
4. A Miniaturized Millimeter-Wave Standing-Wave Filtering Switch With High P1dB
5. A 20–60 GHz Ultra-Wideband SPDT Switch for Multi-Band Transceivers
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