Design of Advanced Encryption Standard using Verilog HDL
Author:
Affiliation:
1. GRIET,ECE,Hyderabad,Telangana,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10125569/10125286/10125765.pdf?arnumber=10125765
Reference17 articles.
1. A Symmetric Key Cryptographic Algorithm
2. Analysis of test sequence generators for built-in self-test implementation
3. Design and implementation of AES encryption and decryption algorithm in FPGA using Verilog HDL;selvakumar;International Journal of Engineering and Technology,2017
4. AES 128- A C implementation for encryption and decryption;SLAA397 A-July 2009,0
5. Efficient implementation of AES algorithm on FPGA
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