Author:
Alawieh Mohamed Baker,Wang Fa,Kanj Rouwaida,Li Xin,Joshi Rajiv
Cited by
8 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Group LARS-Based Iterative Reweighted Least Squares Methodology for Efficient Statistical Modeling of Memory Designs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-12
2. Efficient Performance Modeling for Automated CMOS Analog Circuit Synthesis;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-11
3. Dealing with Aging and Yield in Scaled Technologies;Dependable Embedded Systems;2020-12-10
4. Rethinking Sparsity in Performance Modeling for Analog and Mixed Circuits using Spike and Slab Models;Proceedings of the 56th Annual Design Automation Conference 2019;2019-06-02
5. S
2
-PM;Proceedings of the 24th Asia and South Pacific Design Automation Conference;2019-01-21