Author:
Boule Marc,Chenard Jean-Samuel,Zilic Zeljko
Cited by
9 articles.
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1. Mutation Analysis and Model Checking Guided Test Generation for SoC Run-Time Monitors;2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID);2023-01
2. Model Checking for Verification of Quantum Circuits;Formal Methods;2021
3. Rapid Triggering Capability Using an Adaptive Overlay during FPGA Debug;ACM Transactions on Design Automation of Electronic Systems;2018-12-21
4. A Framework for Combining Concurrent Checking and On-Line Embedded Test for Low-Latency Fault Detection in NoC Routers;Proceedings of the 9th International Symposium on Networks-on-Chip;2015-09-28
5. ForEVeR;ACM Transactions on Embedded Computing Systems;2014-03