A 12.3-mW 12.5-Gb/s Complete Transceiver in 65-nm CMOS Process-Reference-Cited by-同舟云学术

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A 12.3-mW 12.5-Gb/s Complete Transceiver in 65-nm CMOS Process

Published:2010-12 Issue:12 Volume:45 Page:2838-2849
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Fukuda Koji,Yamashita Hiroki,Ono Goichi,Nemoto Ryo,Suzuki Eiichi,Masuda Noboru,Takemoto Takashi,Yuki Fumio,Saito Tatsuya

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/5625049/05607322.pdf?arnumber=5607322

Cited by 49 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 10 Gb/s Line Driver in 65 nm CMOS Technology for Radiation-Pervaded and High-Temperature Applications;IEEE Access;2023

2. A True Full-Duplex IO (TFD-IO) With Background SI Cancellation for High-Density Interfaces;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2022-05

3. A 4-Bit 4GS/s differential current steering DAC for 16-bit PAM transmitter in 45-nm CMOS technology;Applied Nanoscience;2022-02-03

4. A Versatile and Efficient 0.1-to-11 Gb/s CML Transmitter in 40-nm CMOS;2021 18th International SoC Design Conference (ISOCC);2021-10-06

5. Transmission Line Coupler;Wireless Interface Technologies for 3D IC and Module Integration;2021-09-30

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