A $4\times45$ Gb/s Two-Tap FFE VCSEL Driver in 14-nm FinFET CMOS Suitable for Burst Mode Operation-Reference-Cited by-同舟云学术

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A $4\times45$ Gb/s Two-Tap FFE VCSEL Driver in 14-nm FinFET CMOS Suitable for Burst Mode Operation

Published:2018-09 Issue:9 Volume:53 Page:2686-2695
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Khafaji Mohammad Mahdi^ORCID,Belfiore Guido^ORCID,Pliva Jan,Henker Ronny^ORCID,Ellinger Frank

Funder

German Research Foundation in the framework of the collaborative research center 912 Highly Adaptive Energy-Efficient Computing

Seventh Framework Programme

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/8449338/08413082.pdf?arnumber=8413082

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Low-Power High-BW PAM4 VCSEL Driver With Three-Tap FFE in 12-nm CMOS FinFET Process;IEEE Journal of Solid-State Circuits;2024-07

2. A Review of IC Drivers for VCSELs in Datacom Applications;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-01

3. A High-Speed 130-nm SiGe BiCMOS Integrated Duobinary Driver for Data Rate Capacity Enhancement in VCSEL-Based Optical Links;IEEE Access;2024

4. 4-channel, 224Gb/s PAM-4 optical transmitter with group delay compensation in 130-nm BiCMOS technology;IEICE Electronics Express;2023-10-25

5. A 0.82pJ/b 50Gb/s PAM4 VCSEL Driver with 3-Tap Asymmetric FFE in 12nm CMOS FinFET Process;ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC);2023-09-11

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