A 50-Gb/s High-Sensitivity (−9.2 dBm) Low-Power (7.9 pJ/bit) Optical Receiver Based on 0.18- $\mu$ m SiGe BiCMOS Technology
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/8345343/08290564.pdf?arnumber=8290564
Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 10-Gb/s low-power inverter-based optical receiver front-end in 0.13-μmCMOS process;Integration;2024-01
2. Low-Power Inductor-Less Optical Receiver for 50G PON in 28nm CMOS;2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA);2023-10-27
3. A 112-Gb/s —8.2-dBm Sensitivity 4-PAM Linear TIA in 16-nm CMOS With Co-Packaged Photodiodes;IEEE Journal of Solid-State Circuits;2023-03
4. A Linear Inductorless SiGe BiCMOS TIA With $<$2% THD for 64-GBaud Coherent Optical Receivers;IEEE Microwave and Wireless Technology Letters;2023
5. Parallel Versus Serial: Design of an Optical Receiver With Integrated Blue Photodetectors and Digitally Tunable Low-End Cutoff Frequency for MicroLED-Based Parallel Interchip Communication;IEEE Journal of Solid-State Circuits;2023
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