A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and `1'/`0' Dual-Array Equalized Reference Scheme

Author:

Takemura Riichiro,Kawahara Takayuki,Miura Katsuya,Yamamoto Hiroyuki,Hayakawa Jun,Matsuzaki Nozomu,Ono Kazuo,Yamanouchi Michihiko,Ito Kenchi,Takahashi Hiromasa,Ikeda Shoji,Hasegawa Haruhiro,Matsuoka Hideyuki,Ohno Hideo

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

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