A Family of 32 nm IA Processors

Author:

Kurd Nasser A.,Bhamidipati Subramani,Mozak Chris,Miller Jeffrey L.,Mosalikanti Praveen,Wilson Timothy M.,El-Husseini Ali M.,Neidengard Mark,Aly Ramy E.,Nemani Mahadev,Chowdhury Muntaquim,Kumar Rajesh

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. Variation-Mitigation for Reliable, Dependable and Energy-Efficient Future System Design;Dependable Multicore Architectures at Nanoscale;2017-08-30

3. A 0.0021 mm21.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS;IEEE Journal of Solid-State Circuits;2017-01

4. Novel design techniques for noise-tolerant power-gated CMOS circuits;Journal of Semiconductors;2017-01

5. Evaluation of Leakage Reduction Alternatives for Deep Submicron Dynamic Nonuniform Cache Architecture Caches;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2014-01

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