A 450 fs 65-nm CMOS Millimeter-Wave Time-to-Digital Converter Using Statistical Element Selection for All-Digital PLLs-Reference-Cited by-同舟云学术

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A 450 fs 65-nm CMOS Millimeter-Wave Time-to-Digital Converter Using Statistical Element Selection for All-Digital PLLs

Published:2018-02 Issue:2 Volume:53 Page:357-374
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Hussein Ahmed I.^ORCID,Vasadi Sriharsha,Paramesh Jeyanandh^ORCID

Funder

National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://ieeexplore.ieee.org/ielaam/4/8271882/8122300-aam.pdf

Cited by 21 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-08

2. A comprehensive review: ultra-low power all-digital phase-locked loop RF transceivers for biomedical monitoring applications;Analog Integrated Circuits and Signal Processing;2024-05-13

3. Two-Stage Vernier-Based Time-to-Digital Converter with Enhanced Resolution and Digital Error Correction;Iranian Journal of Science and Technology, Transactions of Electrical Engineering;2024-03-10

4. Time-to-digital conversion techniques: a survey of recent developments;Measurement;2023-06

5. A Process-Adaptive Cell-Based Cyclic Time-to-Digital Converter Using One-Way Varactor Cells;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-03

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