A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications-Reference-Cited by-同舟云学术

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A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications

Published:2014-01 Issue:1 Volume:49 Page:61-72
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Tikekar Mehul,Huang Chao-Tsung,Juvekar Chiraag,Sze Vivienne,Chandrakasan Anantha P.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/6690141/06636099.pdf?arnumber=6636099

Cited by 48 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A High-speed Lossless Intra Reference Block Recompression Method for Bandwidth Reduction in Video Coding;2022 11th International Conference on Communications, Circuits and Systems (ICCCAS);2022-05-13

2. Low-energy motion estimation memory system with dynamic management;Journal of Real-Time Image Processing;2021-06-11

3. A Lossless Intra Reference Block Recompression Scheme for Bandwidth Reduction in HEVC-IBC;2021 IEEE International Symposium on Circuits and Systems (ISCAS);2021-05

4. HEVC hardware vs software decoding: An objective energy consumption analysis and comparison;Journal of Systems Architecture;2021-05

5. An Efficient HEVC Fractional Interpolation Hardware;2021 IEEE International Conference on Consumer Electronics (ICCE);2021-01-10

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