Optimizing Data-flow Processor Architecture for Efficient Implementation of DSP Algorithms
Author:
Affiliation:
1. Federal Research Center "Computer Science and Control" of the Russian Academy of Sciences,Institute of Informatics Problems,Moscow,Russia
Funder
Russian Science Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9755448/9755449/09755727.pdf?arnumber=9755727
Reference6 articles.
1. An Algorithm for the Machine Calculation of Complex Fourier Series;cooley;Math Comput,1965
2. DSP Filter Kernels Preliminary Benchmarking for Recurrent Data-flow Architecture
3. Recurrent data-flow architecture: technical aspects of implementation and modeling results;khilko;Problems of Perspective Micro- and Nanoelectronic Systems Development - 2016 Proceedings,2017
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