Realization of Foreground Calibration and Correction of Pipelined ADC Based on 2.5-bit Stages
Author:
Affiliation:
1. Peter the Great St. Petersburg Polytechnic University,Higher School of Electronics and Micro-Electro-Mechanical Systems Institute of Electronics and Telecommunications,St. Petersburg,Russia
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9755448/9755449/09755773.pdf?arnumber=9755773
Reference13 articles.
1. Sinusoid Based Foreground Calibration Algorithm of a Pipeline ADC Using Time Averaged Radix Extraction
2. Digitally-assisted gain calibration strategy for open-loop residue amplifiers in pipeline ADCs
3. A low-power pipeline ADC using a novel MDAC without opamp and a foreground calibration technique
4. An efficient calibration technique for pipeline ADC
5. Fast digital foreground gain error calibration for pipelined ADC
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