22.3 A 76mW 40GS/s 7b Time-Interleaved Hybrid Voltage/Time-Domain ADC with Common-Mode Input Tracking

Author:

Whitcombe Amy1,Kundu Somnath2,Chandrakumar Hariprasad2,Agrawal Abhishek2,Brown Thomas2,Callender Steven3,Carlton Brent2,Pellerano Stefano2

Affiliation:

1. Intel,Santa Clara,CA

2. Intel,Hillsboro,OR

3. Intel,Fort Collins,CO

Publisher

IEEE

Reference6 articles.

1. A Highly Reconfigurable 40-97 GS/s DAC and ADC with 40GHz AFE Bandwidth and sub-35fJ/conv-step for 400 Gb/s Coherent Optical Applications in 7nm FinFET;Nguyen

2. A 24-to-72 GS/s 8b Time-Interleaved SAR ADC with 2.0-to-3.3-pJ/Conversion and 30 dB SNDR at Nyquist in 14nm CMOS FinFET;Kull;ISSCC,2018

3. A 10-GS/s 8-bit 2850-μm2 Two-Step Time-Domain ADC With Speed and Efficiency Enhanced by the Delay-Tracking Pipelined-SAR TDC

4. A 128Gb/s 1.95 pJ/b D-Band Receiver with Integrated PLL and ADC in 22nm FinFET;Agrawal;ISSCC,2023

5. A VTC/TDC-Assisted 4× Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC With 13 GHz ERBW

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