Spatial Distribution of Interface Traps in Sub-50-nm Recess-Channel-Type DRAM Cell Transistors-Reference-Cited by-同舟云学术

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Spatial Distribution of Interface Traps in Sub-50-nm Recess-Channel-Type DRAM Cell Transistors

Published:2011-01 Issue:1 Volume:32 Page:81-83
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Chung Eun-Ae,Kim Young-Pil,Park Min-Chul,Nam Kab-Jin,Lee Sung-Sam,Min Ji-Young,Yang Giyoung,Shin Yu-Gyun,Choi Siyoung,Jin Gyoyoung,Moon Joo-Tae,Kim Sangsig

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/55/5673448/05629430.pdf?arnumber=5629430

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Studies of photosensitivity and photo-induced negative differential resistance (NDR) of TIPS-pentacene-poly(3-hexyl)thiophene blend organic thin film transistor;Synthetic Metals;2015-09

2. Lateral-crack-free, buckled, inkjet-printed silver electrodes on highly pre-stretched elastomeric substrates;Journal of Physics D: Applied Physics;2013-02-12

3. Effects of channel widths, thicknesses of active layer on the electrical and photosensing properties of the 6,13-bis(triisopropylsilylethynyl) pentacene transistors by thermal evaporation method: Comparison study;Synthetic Metals;2012-08

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