Author:
Borromeo Justine Cris,Kondepu Koteswararao,Andriolli Nicola,Valcarenghi Luca
Cited by
4 articles.
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1. A Programmable 5G DU-RU SmartNIC based on MPSoC FPGA;2024 IEEE 25th International Conference on High Performance Switching and Routing (HPSR);2024-07-22
2. Background and State-of-the-Art;Springer Theses;2024
3. FPGA-accelerated SmartNIC for supporting 5G virtualized Radio Access Network;Computer Networks;2022-06
4. Host Bypassing: Direct Data Piping from the Network to the Hardware Accelerator;2021 IEEE 14th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2021-12