An efficient CMOS bridging fault simulator: with SPICE accuracy-Reference-Cited by-同舟云学术

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An efficient CMOS bridging fault simulator: with SPICE accuracy

Published:1996 Issue:9 Volume:15 Page:1071-1080
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Di C.,Jess J.A.G.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx1/43/11446/00536713.pdf?arnumber=536713

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Analog Defect Injection and Fault Simulation Techniques: A Systematic Literature Review;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-01

2. Simulating realistic bridging and crosstalk faults in an industrial setting;Journal of Electronic Testing;2003

3. Application of fuzzy logic in resistive fault modeling and simulation;IEEE Transactions on Fuzzy Systems;2002-08

4. Test generation for stuck-on faults in pass-transistor logic SPL and implementation of DFT circuits;Systems and Computers in Japan;1999-06-30

5. Testability features of the AMD-K6 microprocessor;IEEE Design & Test of Computers;1998

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