36.2 An EM/Power SCA-Resilient AES-256 with Synthesizable Signature Attenuation Using Digital-Friendly Current Source and RO-Bleed-Based Integrated Local Feedback and Global Switched-Mode Control
Author:
Funder
Intel Corporation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9365732/9365735/09365978.pdf?arnumber=9365978
Cited by 18 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
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2. Power and EM Side-Channel-Attack-Resilient AES-128 Core with Round-Aligned Globally-Synchronous-Locally-Asynchronous Operation Based on Tunable Replica Circuits;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18
3. Improved EM Side-Channel Analysis Attack Probe Detection Range Utilizing Coplanar Capacitive Asymmetry Sensing;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12
4. Securing AES Designs Against Power Analysis Attacks: A Survey;IEEE Internet of Things Journal;2023-08-15
5. A 334 μW 0.158 mm2 ASIC for Post-Quantum Key-Encapsulation Mechanism Saber With Low-Latency Striding Toom–Cook Multiplication;IEEE Journal of Solid-State Circuits;2023-08
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