An 82nW 0.53pJ/SOP Clock-Free Spiking Neural Network with 40µs Latency for AloT Wake-Up Functions Using Ultimate-Event-Driven Bionic Architecture and Computing-in-Memory Technique-Reference-Cited by-同舟云学术

An 82nW 0.53pJ/SOP Clock-Free Spiking Neural Network with 40µs Latency for AloT Wake-Up Functions Using Ultimate-Event-Driven Bionic Architecture and Computing-in-Memory Technique

Published:2022-02-20 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Solid- State Circuits Conference (ISSCC)
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Author:

Liu Ying¹,Wang Zhixuan¹,He Wei¹,Shen Linxiao¹,Zhang Yihan¹,Chen Peiyu¹,Wu Meng¹,Zhang Hao¹,Zhou Peng²,Liu Jinguang²,Sun Guangyu¹,Ru Jiayoon¹,Ye Le¹,Huang Ru¹

Affiliation:

1. Peking University,Beijing,China

2. Nano Core Chip Electronic Technology,Hangzhou,China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731795.pdf?arnumber=9731795

Reference6 articles.

1. TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip

2. Always-On, Sub-300-nW, Event-Driven Spiking Neural Network based on Spike-Driven Clock-Generation and Clock- and Power-Gating for an Ultra-Low-Power Intelligent Device

3. Direct Training for Spiking Neural Networks: Faster, Larger, Better

4. Tianjic: A Unified and Scalable Chip Bridging Spike-Based and Continuous Neural Computation

5. 9.9 A Background-Noise and Process-Variation-Tolerant 109nW Acoustic Feature Extractor Based on Spike-Domain Divisive-Energy Normalization for an Always-On Keyword Spotting Device;wang;ISSCC,2021

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