A 4.6pJ/b 200Gb/s Analog DP-QPSK Coherent Optical Receiver in 28nm CMOS
Author:
Affiliation:
1. Peking University,Beijing,China
Funder
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731797.pdf?arnumber=9731797
Reference5 articles.
1. Low voltage low power wide range fully differential CMOS four-quadrant analog multiplier
2. All-Analog Adaptive Equalizer for Coherent Data Center Interconnects
3. Design of Low-Power DSP-Free Coherent Receivers for Data Center Links
4. Fundamentals of Coherent Optical Fiber Communications
5. 29.2 A transmitter and receiver for 100Gb/s coherent networks with inteurated 4x64GS/s 8b ADCs and DACs in 20nm CMOS;cao;ISSCC,2017
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