COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning-Reference-Cited by-同舟云学术

COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning

Published:2022-02-20 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Solid- State Circuits Conference (ISSCC)
language:
Short-container-title:

Author:

Zhu Haozhe¹,Jiao Bo¹,Zhang Jinshan¹,Jia Xinru¹,Wang Yunzhengmao¹,Guan Tianchan²,Wang Shengcheng²,Niu Dimin²,Zheng Hongzhong²,Chen Chixiao¹,Wang Mingyu¹,Zhang Lihua¹,Zeng Xiaoyang¹,Liu Qi¹,Xie Yuan²,Liu Ming¹

Affiliation:

1. Fudan University,Shanghai,China

2. Alibaba DAMO Academy,Shanghai,China

Funder

National Key R&D Program

NSFC

CAS

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731657.pdf?arnumber=9731657

Cited by 15 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Survey of Deep Learning Accelerators for Edge and Emerging Computing;Electronics;2024-07-29

2. Trident-CIM: A LUT-Based Compute-in-Memory Macro With Trident Read Bit-Line and Partial Product Pruning;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-05

3. RDCIM: RISC-V Supported Full-Digital Computing-in-Memory Processor With High Energy Efficiency and Low Area Overhead;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-04

4. ARCTIC: Agile and Robust Compute-In-Memory Compiler with Parameterized INT/FP Precision and Built-In Self Test;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25

5. HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-02