Power Supply Induced Jitter (PSIJ) Modeling, Analysis, and Optimization of High Bandwidth Memory (HBM) I/O Interface
Author:
Affiliation:
1. Korea Advanced Institute of Science and Technology (KAIST),School of Electrical Engineering,Daejeon,South Korea
2. Missouri University of Science and Technology (MST),Department of Electrical and Computer Engineering,Rolla,MO,USA
Funder
National Research Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10241361/10241364/10241680.pdf?arnumber=10241680
Reference9 articles.
1. Transformer Network-Based Reinforcement Learning Method for Power Distribution Network (PDN) Optimization of High Bandwidth Memory (HBM)
2. Scalable Transformer Network-based Reinforcement Learning Method for PSIJ Optimization in HBM
3. Propagation Delay-Based Expression of Power Supply-Induced Jitter Sensitivity for CMOS Buffer Chain
4. Impact of chip and interposer PDN to eye diagram in high speed channels
5. Thermal and Signal Integrity Co-Design and Verification of Embedded Cooling Structure With Thermal Transmission Line for High Bandwidth Memory Module
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