An Efficient FPGA implementation of Turbo Product Code decoder with single and double error correction-Reference-Cited by-同舟云学术

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An Efficient FPGA implementation of Turbo Product Code decoder with single and double error correction

Published:2020-02 Issue: Volume: Page:
ISSN:
Container-title:2020 National Conference on Communications (NCC)
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Author:

Nageen Nitin,Subhashini ,Bhatia Vikas

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9043180/9055988/09055995.pdf?arnumber=9055995

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Thiết kế và tối ưu bộ giải mã TPC trên FPGA;Journal of Military Science and Technology;2023-02-28

2. Low Power Decoder Architecture of Product Code for Storage Controller;2022 19th International SoC Design Conference (ISOCC);2022-10-19

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