Design of a High Voltage Level Shift with High dV/dt Immunity and High Speed-Reference-Cited by-同舟云学术

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Design of a High Voltage Level Shift with High dV/dt Immunity and High Speed

Published:2022-11-11 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
language:
Short-container-title:

Author:

Zhou Zekun¹,Zhang Zhijian¹,Peng Lichen¹

Affiliation:

1. School of Electronic Science and Engineering, University of Electronic Science and Technology of China,Chengdu,China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10090225/10090247/10090318.pdf?arnumber=10090318

Reference6 articles.

1. A high speed and power-efficient level shifter for high voltage buck converter drivers

2. A 30-V Floating Level Shifter with Sub-700-ps Delay and Sub-300-ps Edge Time for GaN Driver

3. A 50V high-speed level shifter with high dv/dt immunity for multi-MHz DCDC converters

4. Nanosecond Delay Floating High Voltage Level Shifters in a 0.35 $\mu$m HV-CMOS Technology

5. MHz-converter design for high conversion ratio

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. CMTI Improvement Circuit for SiC MOSFET Isolated Gate Driver;2023 4th International Conference on Advanced Electrical and Energy Systems (AEES);2023-12-01

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