Application of JVD nitride gate dielectric to a 0.35 micron CMOS process for reduction of gate leakage current and boron penetration-Reference-Cited by-同舟云学术

Application of JVD nitride gate dielectric to a 0.35 micron CMOS process for reduction of gate leakage current and boron penetration

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Container-title:International Electron Devices Meeting. IEDM Technical Digest
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Tseng H.-H.,Tsui P.G.Y.,Tobin P.J.,Mogab J.,Khare M.,Wang X.W.,Ma T.P.,Hegde R.,Hobbs C.,Veteran J.,Hartig M.,Kenig G.,Wang V.,Blumenthal R.,Cotton R.,Kaushik V.,Tamagawa T.,Halpern B.L.,Cui G.J.,Schmitt J.J.

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IEEE

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http://xplorestaging.ieee.org/ielx3/5237/14153/00650467.pdf?arnumber=650467

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