Benchmarking of Analog/RF Performance of Fin-FET, NW-FET, and NS-FET in the Ultimate Scaling Limit
Author:
Affiliation:
1. Department of Electrical Engineering, IIT Ropar, Rupnagar, Punjab, India
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/9722602/09690510.pdf?arnumber=9690510
Reference34 articles.
1. Device Exploration of NanoSheet Transistors for Sub-7-nm Technology Node
2. Physical Insights on Quantum Confinement and Carrier Mobility in Si, Si0.45Ge0.55, Ge Gate-All-Around NSFET for 5 nm Technology Node
3. Limits to the magnitude of capacitance in carbon nanotube array electrode based electrochemical capacitors
4. Analog Figures of Merit of Vertically Stacked Silicon Nanosheets nMOSFETs With Two Different Metal Gates for the Sub-7 nm Technology Node Operating at High Temperatures
5. Influence of channel material properties on performance of nanowire transistors
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