85nm gate length enhancement and depletion mode InSb quantum well transistors for ultra high speed and very low power digital logic applications
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/10701/33791/01609466.pdf?arnumber=1609466
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Growth of III-V Antimonide Heterostructure Nanowires on Silicon Substrate for Esaki Tunnel Diode;Materials Science Forum;2022-03-04
2. Direct Electrodeposition of InSb Devices on Silicon;2021 IEEE 16th Nanotechnology Materials and Devices Conference (NMDC);2021-12-12
3. Development of noise model for InAsSb MOSFETs and their application in low noise amplifiers;Microsystem Technologies;2017-06-13
4. Analysis of energy states of two-dimensional electron gas in pseudomorphically strained InSb high-electron-mobility transistors taking into account the nonparabolicity of the conduction band;Japanese Journal of Applied Physics;2016-07-13
5. III–V/Ge channel MOS device technologies in nano CMOS era;Japanese Journal of Applied Physics;2015-05-07
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