Opportunistic Caching in NoC: Exploring Ways to Reduce Miss Penalty

Author:

Das AbhijitORCID,Kumar Abhishek,Jose JohnORCID,Palesi MaurizioORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Enhancing Lifetime and Performance of MLC NVM Caches Using Embedded Trace Buffers;ACM Transactions on Design Automation of Electronic Systems;2024-05-03

2. A hybrid crossbar-ring on chip network topology for performance improvement of multicore architectures;International Journal of Information Technology;2023-08-31

3. NCDE: In-Network Caching for Directory Entries to Expedite Data Access in Tiled-Chip Multiprocessors;IEEE Access;2023

4. Analyzing Binary Tree based Topology Configuration for Energy Efficient Multicore Architectures;2022 IEEE 9th Uttar Pradesh Section International Conference on Electrical, Electronics and Computer Engineering (UPCON);2022-12-02

5. Power efficient network selector placement in control plane of multiple networks-on-chip;The Journal of Supercomputing;2021-10-25

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