Formal Probabilistic Analysis of Low Latency Approximate Adders
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Link
http://xplorestaging.ieee.org/ielx7/43/8581521/08283738.pdf?arnumber=8283738
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Approximate Adder Circuits: A Comparative Analysis and Evaluation;Proceedings of the International Conference on Paradigms of Computing, Communication and Data Sciences;2023
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3. Research on Brand Illustration Innovative Design Modeling Based on Industry 4.0;Computational Intelligence and Neuroscience;2022-04-11
4. Approximate Computing: Evolutionary Methods for Functional Approximation of Digital Circuits;Materials Today: Proceedings;2022
5. Optimization of Signal Processing Applications Using Parameterized Error Models for Approximate Adders;ACM Transactions on Embedded Computing Systems;2021-03-31
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