Self-Aligned Double Patterning Aware Pin Access and Standard Cell Layout Co-Optimization-Reference-Cited by-同舟云学术

Self-Aligned Double Patterning Aware Pin Access and Standard Cell Layout Co-Optimization

Published:2015-05 Issue:5 Volume:34 Page:699-712
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Xu Xiaoqing,Cline Brian,Yeric Greg,Yu Bei,Pan David Z.

Funder

National Science Foundation (NSF)

Semiconductor Research Corporation (SRC)

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

Cited by 35 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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5. Gear-Ratio-Aware Standard Cell Layout Framework for DTCO Exploration;Proceedings of the 2023 ACM International Workshop on System-Level Interconnect Pathfinding;2023-11-02