Diagnosis of Performance Limiting Segments in Integrated Circuits Using Path Delay Measurements
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Published:2017-02
Issue:2
Volume:36
Page:325-335
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ISSN:0278-0070
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Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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language:
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Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
Author:
Somashekar Ahish MysoreORCID,
Tragoudas Spyros
Funder
National Science Foundation I/UCRC for Embedded Systems at SIUC
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
1 articles.
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