Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits-Reference-Cited by-同舟云学术

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Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits

Published:2013-09 Issue:9 Volume:32 Page:1335-1346
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Chen Yibo,Kursun Eren,Motschman Dave,Johnson Charles,Xie Yuan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx7/43/6582559/06582598.pdf?arnumber=6582598

Cited by 24 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Electrical–Thermal Co-Simulation Model of Chiplet Heterogeneous Integration Systems;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024

2. Thermal-Aware Fixed-Outline 3-D IC Floorplanning: An End-to-End Learning-Based Approach;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

3. ATT-TA: A Cooperative Multiagent Deep Reinforcement Learning Approach for TSV Assignment in 3-D ICs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

4. A Novel Thermal-Aware Floorplanning and TSV Assignment With Game Theory for Fixed-Outline 3-D ICs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-11

5. Thermal modeling and analysis of 3-D integrated circuits with irregular structure;Thermal Science;2023

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