Magnetically-enhanced capacitively-coupled plasma etching for 300 mm wafer-scale fabrication of Cu through-silicon-vias for 3D logic integration-Reference-Cited by-同舟云学术

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Magnetically-enhanced capacitively-coupled plasma etching for 300 mm wafer-scale fabrication of Cu through-silicon-vias for 3D logic integration

Published:2009-06 Issue: Volume: Page:
ISSN:
Container-title:2009 IEEE International Interconnect Technology Conference
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Author:

Teh W.H.,Caramto R.,Arkalgud S.,Saito T.,Maruyama K.,Maekawa K.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5069981/5090321/05090338.pdf?arnumber=5090338

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Plasma sputtering of biased electrodes in an oblique magnetic field;Plasma Sources Science and Technology;2023-09-01

2. An overview of through-silicon-via technology and manufacturing challenges;Microelectronic Engineering;2015-03

3. Quantitative Evaluation Method for Etch Sidewall Profile of Through-Silicon Vias (TSVs);ETRI Journal;2014-08-01

4. 3D integration review;Science China Information Sciences;2011-05

5. Through-Silicon via Technology for 3D IC;Ultra-thin Chip Technology and Applications;2010-11-12

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