Author:
Liang Xiaoyao,Wei Gu-Yeon,Brooks David
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
17 articles.
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1. Fault-Tolerant General Purposed Processors;Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design;2023
2. Fault-Tolerant Circuits;Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design;2023
3. Variation-Aware Pipelined Cores through Path Shaping and Dynamic Cycle Adjustment;Proceedings of the International Symposium on Low Power Electronics and Design;2018-07-23
4. A Rank Decomposed Statistical Error Compensation Technique for Robust Convolutional Neural Networks in the Near Threshold Voltage Regime;Journal of Signal Processing Systems;2018-02-15
5. Sthira: A Formal Approach to Minimize Voltage Guardbands under Variation in Networks-on-Chip for Energy Efficiency;2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT);2017-09