Low-on-resistance strain-controlled LDMOS transistors for 0.25-μm power ICs
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5871956/5890767/05890817.pdf?arnumber=5890817
Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Performance and Reliability Impact in Strained-Silicon n-LDMOS;2022 10th International Symposium on Next-Generation Electronics (ISNE);2023-05-12
2. Novel Ultralow-On-Resistance SOI LDMOS with Strain-Induced Mobility Enhancement and Electric Field Modulation;2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT);2022-10-25
3. Comprehensive Investigation on Electrical Properties of Split-Gate Trench Power MOSFETs Under Mechanical Strains;IEEE Transactions on Electron Devices;2022-03
4. New Strained Silicon-On-Insulator Lateral MOSFET With Ultralow ON-Resistance by Si1-xGex P-Top Layer and Trench Gate;IEEE Electron Device Letters;2021-06
5. Performance Boosts in n-Type Lateral Double-Diffused MOSFET With Process-Induced Strain Using Contact Etch Stop Layer Stressor;IEEE Transactions on Electron Devices;2021-01
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