Fabrication and Analysis of a ${\rm Si}/{\rm Si}_{0.55}{\rm Ge}_{0.45}$ Heterojunction Line Tunnel FET-Reference-Cited by-同舟云学术

Fabrication and Analysis of a ${\rm Si}/{\rm Si}_{0.55}{\rm Ge}_{0.45}$ Heterojunction Line Tunnel FET

Published:2014-03 Issue:3 Volume:61 Page:707-715
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Walke Amey M.,Vandooren Anne,Rooyackers Rita,Leonelli Daniele,Hikavyy Andriy,Loo Roger,Verhulst Anne S.,Kao Kuo-Hsing,Huyghebaert Cedric,Groeseneken Guido,Rao Valipe Ramgopal,Bhuwalka Krishna K.,Heyns Marc M.,Collaert Nadine,Thean Aaron Voon-Yew

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/6746059/06727530.pdf?arnumber=6727530

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