Neuron Deactivation Scheme for Defect-Tolerant Memristor Neural Networks
Author:
Affiliation:
1. Kookmin University,School of Electrical Engineering,Seoul,Korea
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9837335/9837476/09837695.pdf?arnumber=9837695
Reference16 articles.
1. Synapse-Neuron-Aware Training Scheme of Defect-Tolerant Neural Networks with Defective Memristor Crossbars
2. On Improving Fault Tolerance of Memristor Crossbar Based Neural Network Designs by Target Sparsifying
3. Hybrid Circuit of Memristor and Complementary Metal-Oxide-Semiconductor for Defect-Tolerant Spatial Pooling with Boost-Factor Adjustment
4. Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training;van pham;Micromachines,2019
5. CIFAR-10 and CIFAR-100 Datasets;krizhevsky,2018
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Memristor Crossbar Circuits Implementing Equilibrium Propagation for On-Device Learning;Micromachines;2023-07-03
2. Circuit and Training Techniques Compensating for Non-Ideal Effects in Memristor Neural Networks;2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT);2022-10-25
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