Feasibility Study of Integrating Source Driver on Array Using Low-Temperature Polycrystalline Silicon Thin-Film Transistors-Reference-Cited by-同舟云学术

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Feasibility Study of Integrating Source Driver on Array Using Low-Temperature Polycrystalline Silicon Thin-Film Transistors

Published:2016-12 Issue:12 Volume:12 Page:1547-1553
ISSN:1551-319X
Container-title:Journal of Display Technology
language:
Short-container-title:J. Display Technol.

Author:

Tai Ya-Hsiang,Lin Ching-Chih,Lin Chi-Hao,Chang Chun-Yi

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/9425/7572227/07519092.pdf?arnumber=7519092

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Abnormal Two-Stage Degradation on P-Type Low-Temperature Polycrystalline-Silicon Thin-Film Transistor Under Hot Carrier Conditions;IEEE Electron Device Letters;2022-05

2. Investigation of Degradation Behavior During Illuminated Negative Bias Temperature Stress in P-Channel Low-Temperature Polycrystalline Silicon Thin-Film Transistors;IEEE Electron Device Letters;2021-05

3. Abnormal hysteresis formation in hump region after positive gate bias stress in low-temperature poly-silicon thin film transistors;Journal of Physics D: Applied Physics;2020-07-16

4. Clocked control scheme of separating TFTs for a node‐sharing LTPS TFT shift register with large number of outputs;Journal of the Society for Information Display;2020-02-18

5. Analysis of Negative Bias Temperature Instability Degradation in p-Type Low-Temperature Polycrystalline Silicon Thin-Film Transistors of Different Grain Sizes;IEEE Electron Device Letters;2019-11

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