A Heuristic Approximation Algorithm to Design Power and Area Efficient FIR Filters in the Canonic Signed Digit Space
Author:
Affiliation:
1. National Institute of Technology,Department of Electronics and Communication Engineering,Calicut,Kerala,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9774032/9773333/09774205.pdf?arnumber=9774205
Reference13 articles.
1. Design and Analysis of Area and Power Efficient Approximate Booth Multipliers
2. Non-uniform cosine modulated filter banks using meta-heuristic algorithms in CSD space
3. On the performance of artificial bee colony (ABC) algorithm
4. Inexact Addition and Subtraction for the Reconfigurable FIR Filter Implementation using CSD based Common Subexpression Elimination
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1. Area-Efficient VLSI Design for Fibonacci Q-matrix-based Cyber-Physical Systems using Canonical Signed Digit Recoding Methods with Modulo Reductions;2023 IEEE 5th Eurasia Conference on IOT, Communication and Engineering (ECICE);2023-10-27
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