Author:
Yang Fan,Chakravarty Sreejit,Devta-Prasanna Narendra,Reddy Sudhakar M.,Pomeranz Irith
Cited by
9 articles.
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1. Near-Threshold-at-Gate based Test for Stuck-on Fault in Scan-chain Testing;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06
2. Test Generation for Defect-Based Faults of Scan Flip-Flops;2023 IEEE 41st VLSI Test Symposium (VTS);2023-04-24
3. A High Performance Scan Flip-Flop Design for Serial and Mixed Mode Scan Test;IEEE Transactions on Device and Materials Reliability;2018-06
4. Structure-Oriented Test of Reconfigurable Scan Networks;2017 IEEE 26th Asian Test Symposium (ATS);2017-11
5. A Method for Diagnosing Bridging Fault between a Gate Signal Line and a Clock Line;IEICE Transactions on Information and Systems;2017