High-voltage tolerant stimulation monitoring circuit in conventional CMOS process
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx5/5268172/5280726/05280893.pdf?arnumber=5280893
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 9-V-Tolerant Stacked-Switched-Capacitor Stimulation System With Level-Adaptive Switch Control and Rapid Stimulus-Synchronized Charge Balancing for Implantable Devices;IEEE Journal of Solid-State Circuits;2023
2. An Analog Driver compliant with Supply Voltages exceeding the Ratings of Standard CMOS Processes;2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2022-10-24
3. A 1.6-V Tolerant Multiplexer Switch With 0.96-V Core Devices in 28-nm CMOS Technology;IEEE Transactions on Circuits and Systems I: Regular Papers;2021-11
4. An Efficient, Wide-Output, High-Voltage Charge Pump With a Stage Selection Circuit Realized in a Low-Voltage CMOS Process;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-09
5. A High-Voltage-Tolerant and Precise Charge-Balanced Neuro-Stimulator in Low Voltage CMOS Process;IEEE Transactions on Biomedical Circuits and Systems;2016-12
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