Author:
Masuda H.,Ohkawa S.-i.,Kurokawa A.,Aoki M.
Cited by
14 articles.
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1. Variation-Aware Clock Path Timing Model in Near-Threshold Voltage;2023 International Symposium of Electronics Design Automation (ISEDA);2023-05-08
2. Fast and Efficient Offset Compensation by Noise-Aware Pre-Charge and Operation of DRAM Bit Line Sense Amplifier;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-04
3. Quick and Efficient Offset Compensation by Noise-Aware Operation of DRAM Bit Line Sense Amplifier;2022 37th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC);2022-07-05
4. Uncertainty Quantification of RF Circuits Using Stochastic Collocation Techniques;IEEE Electromagnetic Compatibility Magazine;2022
5. Gate Delay Under Process Variations;Timing Performance of Nanometer Digital Circuits Under Process Variations;2018