A 0.13mJ/Prediction CIFAR-100 Raster-Scan- Based Wired-Logic Processor Using Non-Linear Neural Network
Author:
Affiliation:
1. Graduate School of Engineering, The University of Tokyo,Tokyo,Japan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10181241/10181318/10181427.pdf?arnumber=10181427
Reference8 articles.
1. Computing's energy problem (and what we can do about it);horowitz;IEEE International Solid-State Circuits Conference (ISSCC) Dig Tech Papers,2014
2. Convolutional networks for fast, energy-efficient neuromorphic computing
3. Hiddenite: 4K-PE Hidden Network Inference 4D-Tensor Engine Exploiting On-Chip Model Construction Achieving 34.8-to-16.0TOPS/W for CIFAR-100 and ImageNet
4. NC-Net: Efficient Neuromorphic Computing Using Aggregated Sub-nets on a Crossbar-based Architecture with Non-volatile Memory
5. A 13.7?J/prediction 88% Accuracy CIFAR-I0 Single-Chip Wired-logic Processor in 16-nm FPGA using Non-Linear Neural Network;hsu;IEEE Hot Chips 22 Symposium (HCS),2022
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1. Efficient FPGA Resource Utilization in Wired-Logic Processors Using Coarse and Fine Segmentation of LUTs for Non-Linear Functions;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. A System to Increase the Accuracy of Deep Learning based Classification by the Distribution of Labels;Proceedings of the 3rd International Conference on Computer, Artificial Intelligence and Control Engineering;2024-01-26
3. A 0.13mJ/Prediction CIFAR-100 Fully Synthesizable Raster-Scan-Based Wired-Logic Processor in 16-nm FPGA;IEICE Transactions on Electronics;2023
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