Two-pads per electrode in-situ test structure for micron-scale flip-chip bonding reliability of chip-on-chip device
Author:
Affiliation:
1. The University of Tokyo,School of Engineering,Japan
2. Tokyo Institute of Technology,Laboratory for Future Interdisciplinary Research of Science and Technology,Japan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9898143/9898103/09898248.pdf?arnumber=9898248
Reference4 articles.
1. Two dimensional micro conveyance system with through holes for electrical and fluidic interconnection
2. An integrated CMOS-MEMS probe having two-tips per cantilever for individual contact sensing and kelvin measurement with two cantilevers
3. Sub-Micron-Accuracy Gold-to-Gold Interconnection Flip-Chip Bonding Approach for Electronics–Optics Heterogeneous Integration
4. A 1/4-inch 8Mpixel back-illuminated stacked CMOS image sensor
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1. Test Structure to Assess Bump Shape Influence on Hybrid Bonding;2024 IEEE 36th International Conference on Microelectronic Test Structures (ICMTS);2024-04-15
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