Author:
Kerth D.A.,Sooch N.S.,Swanson E.J.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
20 articles.
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1. Low Power High-Speed Optimized Comparator for Flash ADC;2022 International Conference on Smart Generation Computing, Communication and Networking (SMART GENCON);2022-12-23
2. A Two-Step ADC With Statistical Calibration;IEEE Transactions on Circuits and Systems I: Regular Papers;2020-08
3. An 84.6-dB-SNDR and 98.2-dB-SFDR Residue-Integrated SAR ADC for Low-Power Sensor Applications;IEEE Journal of Solid-State Circuits;2018-02
4. A 4th-Order Continuous-Time Delta-Sigma Modulator Using 6-bit Double Noise-Shaped Quantizer;IEEE Journal of Solid-State Circuits;2017-12
5. Design of Low Power 5-Bit Hybrid Flash ADC;2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI);2016-07