Design of Protocol-Based Finite-Time Memory Fault Detection Scheme With Circuit System Application-Reference-Cited by-同舟云学术

Design of Protocol-Based Finite-Time Memory Fault Detection Scheme With Circuit System Application

Published:2024-05 Issue:5 Volume:54 Page:3110-3123
ISSN:2168-2216
Container-title:IEEE Transactions on Systems, Man, and Cybernetics: Systems
language:
Short-container-title:IEEE Trans. Syst. Man Cybern, Syst.

Author:

Hu Jun¹^ORCID,Chen Weilu²^ORCID,Wu Zhihui³^ORCID,Chen Dongyan²^ORCID,Yi Xiaojian⁴^ORCID

Affiliation:

1. Department of Applied Mathematics, the School of Automation, and the Key Laboratory of Advanced Manufacturing and Intelligent Technology, Ministry of Education, Harbin University of Science and Technology, Harbin, China

2. Heilongjiang Provincial Key Laboratory of Optimization Control and Intelligent Analysis for Complex Systems, Harbin University of Science and Technology, Harbin, China

3. Department of Artificial Intelligence, Harbin University of Science and Technology, Harbin, China

4. School of Mechatronical Engineering, Beijing Institute of Technology, Beijing, China

Funder

National Natural Science Foundation of China

Natural Science Foundation of Heilongjiang Province of China

National High-End Foreign Experts Recruitment Plan of China

BIGC Project

Initial Funding for the Doctoral Program of BIGC

Alexander von Humboldt Foundation of Germany

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

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