An area-efficient VLSI architecture of a Reed-Solomon decoder/encoder for digital VCRs
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Media Technology
Link
http://xplorestaging.ieee.org/ielx3/30/13954/00642367.pdf?arnumber=642367
Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Fast Algorithm for Finding the Roots of Polynomials over Finite Fields;2023 International Conference on Wireless Communications and Signal Processing (WCSP);2023-11-02
2. Area and Power analysis of a Scalable Primitive Polynomial computation circuit over the field GF(2);2022 IEEE 15th Dallas Circuit And System Conference (DCAS);2022-06-17
3. Modified Euclidean algorithms for decoding Reed-Solomon codes;2009 IEEE International Symposium on Information Theory;2009-06
4. A Low Complexity Design of Reed Solomon Code Algorithm for Advanced RAID System;IEEE Transactions on Consumer Electronics;2007
5. Fault tolerant solid state mass memory for space applications;IEEE Transactions on Aerospace and Electronic Systems;2005-10
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