A Side-Channel Attack on a Hardware Implementation of CRYSTALS-Kyber

Author:

Ji Yanning1,Wang Ruize1,Ngo Kalle1,Dubrova Elena1,Backlund Linus1

Affiliation:

1. KTH Royal Institute of Technology,Stockholm,Sweden

Funder

Vinnova

Publisher

IEEE

Reference17 articles.

1. Memory-Efficient High-Speed Implementation of Kyber on Cortex-M4

2. A pure hardware implementation of CRYSTALS-KYBER PQC algorithm through resource reuse

3. Secure Integration of Asymmetric and Symmetric Encryption Schemes

4. CRYSTALS-Kyber algorithm specifications and supporting documentation;schwabe,2020

5. A message recovery attack on LWE/LWR-based PKE/KEMs using amplitude-modulated EM emanations;wang;Proc of 25th Annual Int Conf on Information Security and Cryptology,2022

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1. Designing a Scalable and Area-Efficient Hardware Accelerator Supporting Multiple PQC Schemes;Electronics;2024-08-23

2. REPQC: Reverse Engineering and Backdooring Hardware Accelerators for Post-quantum Cryptography;Proceedings of the 19th ACM Asia Conference on Computer and Communications Security;2024-07

3. A Cryptographic Hardware Engineering Course based on FPGA and Security Analysis Equipment;Proceedings of the Great Lakes Symposium on VLSI 2024;2024-06-12

4. Hardware Circuits and Systems Design for Post-Quantum Cryptography—A Tutorial Brief;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-03

5. Evaluating Side-Channel Attack Vulnerabilities in Post-Quantum CRYSTALS-Kyber Hardware Based on Simple Power Analysis;2023 IEEE 17th International Conference on Anti-counterfeiting, Security, and Identification (ASID);2023-12-01

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